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42 lines
1.1 KiB
ArmAsm
42 lines
1.1 KiB
ArmAsm
/*
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* Copyright © 2017-2020 The Crust Firmware Authors.
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* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-only
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*/
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#include <macros.S>
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#include <asm/spr.h>
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func start
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l.mfspr r2, r0, SPR_SYS_PPC_ADDR
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l.sfltui r2, 0x4000 # Size of exception vector area
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l.bf 1f
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l.srli r2, r2, 8 # Vector address → exception number
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l.addi r2, r0, 0 # Set to zero if not an exception
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1: l.addi r3, r0, 0 # Invalidate instruction cache
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l.addi r4, r0, 4096 # Cache lines (256) * block size (16)
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2: l.mtspr r0, r3, SPR_ICACHE_ICBIR_ADDR
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l.sfltu r3, r4
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l.bf 2b
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l.addi r3, r3, 16 # Cache block size
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l.psync # Flush CPU pipeline
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l.mfspr r3, r0, SPR_SYS_SR_ADDR # Enable instruction cache
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l.ori r3, r3, SPR_SYS_SR_ICE_MASK
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l.mtspr r0, r3, SPR_SYS_SR_ADDR
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l.nop # One cache block of nops
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l.nop
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l.nop
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l.nop
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l.movhi r3, hi(__bss_start) # Clear .bss
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l.ori r3, r3, lo(__bss_start)
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l.movhi r4, hi(__bss_end)
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l.ori r4, r4, lo(__bss_end)
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3: l.sw 0(r3), r0
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l.sfltu r3, r4
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l.bf 3b
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l.addi r3, r3, 4
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l.movhi r1, hi(__stack_end)
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l.ori r1, r1, lo(__stack_end) # Initialize stack pointer
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l.j main # Jump to C entry point
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l.or r3, r2, r2
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endfunc start
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