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stm32: Initial support for stm32f070
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
69
src/stm32/stm32f0_serial.c
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69
src/stm32/stm32f0_serial.c
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// STM32F0 serial
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//
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// Copyright (C) 2019 Kevin O'Connor <kevin@koconnor.net>
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//
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include "autoconf.h" // CONFIG_SERIAL_BAUD
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#include "board/armcm_boot.h" // armcm_enable_irq
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#include "board/serial_irq.h" // serial_rx_byte
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#include "command.h" // DECL_CONSTANT_STR
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#include "internal.h" // enable_pclock
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#include "sched.h" // DECL_INIT
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// Select the configured serial port
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#if CONFIG_SERIAL_PORT == 1
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA10,PA9");
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#define GPIO_Rx GPIO('A', 10)
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#define GPIO_Tx GPIO('A', 9)
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#define USARTx USART1
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#define USARTx_IRQn USART1_IRQn
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#elif CONFIG_SERIAL_PORT == 2
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA3,PA2");
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#define GPIO_Rx GPIO('A', 3)
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#define GPIO_Tx GPIO('A', 2)
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#define USARTx USART2
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#define USARTx_IRQn USART2_IRQn
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#endif
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#define CR1_FLAGS (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE \
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| USART_CR1_RXNEIE)
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void
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USARTx_IRQHandler(void)
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{
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uint32_t sr = USARTx->ISR;
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if (sr & (USART_ISR_RXNE | USART_ISR_ORE))
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serial_rx_byte(USARTx->RDR);
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if (sr & USART_ISR_TXE && USARTx->CR1 & USART_CR1_TXEIE) {
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uint8_t data;
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int ret = serial_get_tx_byte(&data);
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if (ret)
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USARTx->CR1 = CR1_FLAGS;
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else
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USARTx->TDR = data;
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}
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}
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void
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serial_enable_tx_irq(void)
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{
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USARTx->CR1 = CR1_FLAGS | USART_CR1_TXEIE;
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}
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void
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serial_init(void)
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{
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enable_pclock((uint32_t)USARTx);
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uint32_t pclk = get_pclock_frequency((uint32_t)USARTx);
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uint32_t div = DIV_ROUND_CLOSEST(pclk, CONFIG_SERIAL_BAUD);
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USARTx->BRR = (((div / 16) << USART_BRR_DIV_MANTISSA_Pos)
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| ((div % 16) << USART_BRR_DIV_FRACTION_Pos));
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USARTx->CR1 = CR1_FLAGS;
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armcm_enable_irq(USARTx_IRQHandler, USARTx_IRQn, 0);
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gpio_peripheral(GPIO_Rx, GPIO_FUNCTION(1), 1);
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gpio_peripheral(GPIO_Tx, GPIO_FUNCTION(1), 0);
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}
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DECL_INIT(serial_init);
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