mirror of
https://github.com/Klipper3d/klipper.git
synced 2025-11-03 20:05:49 +01:00
77 lines
6.4 KiB
C
77 lines
6.4 KiB
C
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/* ---------------------------------------------------------------------------- */
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/* Atmel Microcontroller Software Support */
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/* SAM Software Package License */
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/* ---------------------------------------------------------------------------- */
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/* Copyright (c) %copyright_year%, Atmel Corporation */
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/* */
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/* All rights reserved. */
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/* */
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/* Redistribution and use in source and binary forms, with or without */
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/* modification, are permitted provided that the following condition is met: */
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/* */
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/* - Redistributions of source code must retain the above copyright notice, */
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/* this list of conditions and the disclaimer below. */
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/* */
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/* Atmel's name may not be used to endorse or promote products derived from */
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/* this software without specific prior written permission. */
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/* */
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/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
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/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
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/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
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/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */
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/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
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/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
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/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
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/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */
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/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
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/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
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/* ---------------------------------------------------------------------------- */
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#ifndef _SAM3XA_UART_INSTANCE_
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#define _SAM3XA_UART_INSTANCE_
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/* ========== Register definition for UART peripheral ========== */
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#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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#define REG_UART_CR (0x400E0800U) /**< \brief (UART) Control Register */
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#define REG_UART_MR (0x400E0804U) /**< \brief (UART) Mode Register */
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#define REG_UART_IER (0x400E0808U) /**< \brief (UART) Interrupt Enable Register */
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#define REG_UART_IDR (0x400E080CU) /**< \brief (UART) Interrupt Disable Register */
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#define REG_UART_IMR (0x400E0810U) /**< \brief (UART) Interrupt Mask Register */
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#define REG_UART_SR (0x400E0814U) /**< \brief (UART) Status Register */
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#define REG_UART_RHR (0x400E0818U) /**< \brief (UART) Receive Holding Register */
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#define REG_UART_THR (0x400E081CU) /**< \brief (UART) Transmit Holding Register */
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#define REG_UART_BRGR (0x400E0820U) /**< \brief (UART) Baud Rate Generator Register */
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#define REG_UART_RPR (0x400E0900U) /**< \brief (UART) Receive Pointer Register */
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#define REG_UART_RCR (0x400E0904U) /**< \brief (UART) Receive Counter Register */
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#define REG_UART_TPR (0x400E0908U) /**< \brief (UART) Transmit Pointer Register */
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#define REG_UART_TCR (0x400E090CU) /**< \brief (UART) Transmit Counter Register */
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#define REG_UART_RNPR (0x400E0910U) /**< \brief (UART) Receive Next Pointer Register */
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#define REG_UART_RNCR (0x400E0914U) /**< \brief (UART) Receive Next Counter Register */
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#define REG_UART_TNPR (0x400E0918U) /**< \brief (UART) Transmit Next Pointer Register */
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#define REG_UART_TNCR (0x400E091CU) /**< \brief (UART) Transmit Next Counter Register */
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#define REG_UART_PTCR (0x400E0920U) /**< \brief (UART) Transfer Control Register */
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#define REG_UART_PTSR (0x400E0924U) /**< \brief (UART) Transfer Status Register */
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#else
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#define REG_UART_CR (*(__O uint32_t*)0x400E0800U) /**< \brief (UART) Control Register */
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#define REG_UART_MR (*(__IO uint32_t*)0x400E0804U) /**< \brief (UART) Mode Register */
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#define REG_UART_IER (*(__O uint32_t*)0x400E0808U) /**< \brief (UART) Interrupt Enable Register */
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#define REG_UART_IDR (*(__O uint32_t*)0x400E080CU) /**< \brief (UART) Interrupt Disable Register */
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#define REG_UART_IMR (*(__I uint32_t*)0x400E0810U) /**< \brief (UART) Interrupt Mask Register */
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#define REG_UART_SR (*(__I uint32_t*)0x400E0814U) /**< \brief (UART) Status Register */
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#define REG_UART_RHR (*(__I uint32_t*)0x400E0818U) /**< \brief (UART) Receive Holding Register */
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#define REG_UART_THR (*(__O uint32_t*)0x400E081CU) /**< \brief (UART) Transmit Holding Register */
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#define REG_UART_BRGR (*(__IO uint32_t*)0x400E0820U) /**< \brief (UART) Baud Rate Generator Register */
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#define REG_UART_RPR (*(__IO uint32_t*)0x400E0900U) /**< \brief (UART) Receive Pointer Register */
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#define REG_UART_RCR (*(__IO uint32_t*)0x400E0904U) /**< \brief (UART) Receive Counter Register */
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#define REG_UART_TPR (*(__IO uint32_t*)0x400E0908U) /**< \brief (UART) Transmit Pointer Register */
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#define REG_UART_TCR (*(__IO uint32_t*)0x400E090CU) /**< \brief (UART) Transmit Counter Register */
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#define REG_UART_RNPR (*(__IO uint32_t*)0x400E0910U) /**< \brief (UART) Receive Next Pointer Register */
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#define REG_UART_RNCR (*(__IO uint32_t*)0x400E0914U) /**< \brief (UART) Receive Next Counter Register */
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#define REG_UART_TNPR (*(__IO uint32_t*)0x400E0918U) /**< \brief (UART) Transmit Next Pointer Register */
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#define REG_UART_TNCR (*(__IO uint32_t*)0x400E091CU) /**< \brief (UART) Transmit Next Counter Register */
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#define REG_UART_PTCR (*(__O uint32_t*)0x400E0920U) /**< \brief (UART) Transfer Control Register */
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#define REG_UART_PTSR (*(__I uint32_t*)0x400E0924U) /**< \brief (UART) Transfer Status Register */
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#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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#endif /* _SAM3XA_UART_INSTANCE_ */
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