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55 lines
2.2 KiB
C
55 lines
2.2 KiB
C
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// THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT
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/**
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* Copyright (c) 2024 Raspberry Pi Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _HARDWARE_STRUCTS_VREG_AND_CHIP_RESET_H
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#define _HARDWARE_STRUCTS_VREG_AND_CHIP_RESET_H
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/**
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* \file rp2040/vreg_and_chip_reset.h
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*/
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#include "hardware/address_mapped.h"
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#include "hardware/regs/vreg_and_chip_reset.h"
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// Reference to datasheet: https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf#tab-registerlist_vreg_and_chip_reset
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//
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// The _REG_ macro is intended to help make the register navigable in your IDE (for example, using the "Go to Definition" feature)
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// _REG_(x) will link to the corresponding register in hardware/regs/vreg_and_chip_reset.h.
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//
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// Bit-field descriptions are of the form:
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// BITMASK [BITRANGE] FIELDNAME (RESETVALUE) DESCRIPTION
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typedef struct {
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_REG_(VREG_AND_CHIP_RESET_VREG_OFFSET) // VREG_AND_CHIP_RESET_VREG
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// Voltage regulator control and status
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// 0x00001000 [12] ROK (0) regulation status +
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// 0x000000f0 [7:4] VSEL (0xb) output voltage select +
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// 0x00000002 [1] HIZ (0) high impedance mode select +
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// 0x00000001 [0] EN (1) enable +
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io_rw_32 vreg;
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_REG_(VREG_AND_CHIP_RESET_BOD_OFFSET) // VREG_AND_CHIP_RESET_BOD
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// brown-out detection control
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// 0x000000f0 [7:4] VSEL (0x9) threshold select +
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// 0x00000001 [0] EN (1) enable +
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io_rw_32 bod;
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_REG_(VREG_AND_CHIP_RESET_CHIP_RESET_OFFSET) // VREG_AND_CHIP_RESET_CHIP_RESET
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// Chip reset control and status
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// 0x01000000 [24] PSM_RESTART_FLAG (0) This is set by psm_restart from the debugger
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// 0x00100000 [20] HAD_PSM_RESTART (0) Last reset was from the debug port
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// 0x00010000 [16] HAD_RUN (0) Last reset was from the RUN pin
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// 0x00000100 [8] HAD_POR (0) Last reset was from the power-on reset or brown-out...
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io_rw_32 chip_reset;
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} vreg_and_chip_reset_hw_t;
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#define vreg_and_chip_reset_hw ((vreg_and_chip_reset_hw_t *)VREG_AND_CHIP_RESET_BASE)
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static_assert(sizeof (vreg_and_chip_reset_hw_t) == 0x000c, "");
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#endif // _HARDWARE_STRUCTS_VREG_AND_CHIP_RESET_H
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